1. Field of the Invention
The present invention relates to a semiconductor memory circuit having redundant memory cells for use in place of defective memory cells.
2. Description of the Related Art
In the manufacture of a memory device disposed on a semiconductor chip, small defects present in the chip frequently disable one or a few memory cells, while the other memory cells and circuits operate normally. Manufacturing yields can be improved if the chip is provided with redundant memory cells, which can be accessed in place of the defective memory cells.
Various redundancy schemes are known and used. Some schemes have redundant columns of memory cells; others have redundant rows of memory cells. Typical schemes employ a reconfiguration circuit that is programmed by means of laser-blown fuses, to determine whether redundant or non-redundant memory cells are accessed.
One conventional redundancy scheme provides redundant columns of memory cells, which are coupled to redundant sense amplifiers. The reconfiguration circuit is programmed to send enable signals to the line drivers that activate the sense amplifiers. When a column with a defective memory cell is addressed, the reconfiguration circuit disables the corresponding line driver and enables the line driver of a redundant column instead.
One problem with this replacement scheme is that it limits the access speed of the memory device, because the reconfiguration circuit must operate before activation of the sense amplifiers can begin. In memory devices that provide high-speed access to a plurality of memory cells, there are also timing problems caused by different signal propagation delays when the redundant column and the column it replaces are disposed in widely separated locations.
In a variation of this conventional scheme, the reconfiguration circuit operates by shifting columns so that when a column with a defective memory cell is accessed, it is replaced by the lower adjacent column, which is replaced by the next-lower column, and so on, the lowest column being a redundant column. This variation substantially eliminates the problem of timing differences, because each column is replaced by an adjacent column, but the problem of delayed sense amplification remains.
A further problem in these conventional replacement and shifting schemes occurs in memory devices permitting masked access such as write-per-bit access. In this case, besides controlling the column drivers, the reconfiguration circuit must perform a similar type of replacement or shifting control of the masking circuits.
Further information about these conventional schemes and their problems will be given following the detailed description of the invention.